1. Field of the Invention
The present invention relates to a semiconductor integrated circuit and a method for reducing consumed power of the semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit of a clock synchronous system which operates on receipt of a clock signal, and a method for reducing consumed power of the semiconductor integrated circuit.
2. Description of the Background Art
Recently, the consumed power of a semiconductor integrated circuit has been increased. Various attempts have been made to reduce the consumed power. As effective methods for taking the dependency of an input signal into consideration, a method for reducing the consumed power by changing the representation of twos complement to the sign--absolute value representation to perform an operation, a method for reducing the consumed power by changing the order of input signals, and the like have been proposed (IEEE 1994 Custom Integrated Circuits Conference, 12.1.1-12.1-8, pp 259-266).
However, the representation of twos complement is essentially suitable for the signal processing such as an arithmetic operation. For this reason, in the case where the signal processing is performed based on the sign--absolute value representation, not only the design of an operation part but also that of a control circuit for the signal processing becomes complicated. In the case where the order of the input signals is changed, there is a problem that the function of retaining the input signals is required besides the complicated design of the control circuit for the signal processing.